1. Technical Field
This disclosure relates to semiconductor fabricating, and more particularly, to etching methods for fabricating deep trench structures in a semiconductor substrate.
2. Description of the Related Art
As semiconductor devices migrate to smaller ground rules, new fabrication processes and device structures are developed to maintain performance characteristics of these semiconductor devices. It is therefore desirable to form devices deeper in a substrate to take advantage of additional space without increasing the layout area of the devices. For example, in dynamic random access memory (DRAM) technology, a deeper trench may be employed to satisfy the per cell capacitance requirements. However, it is known that, during etching of a deep trench, a layer of redeposited etch by-products builds up inside a deep trench (DT) hole, especially at the top of the trench near a hard mask which is employed as an etch mask to pattern the deep trenches (DT).
This redeposited build-up eventually pinches off the DT hole. The accumulation of redeposited etch by-products layer occurs during DT etch, which is especially severe at the top of the DT/hard mask. As the layer of re-deposited etch by-products accumulates, the effective diameter of the DT pattern/hole is reduced as illustratively shown in FIG. 1. One effect of this is that the etching species cannot easily reach the bottom of the deep trench. Another effect is that the etching by-products cannot, easily escape from the trench. As a result, further etching of Si is impeded and the Si etch rate in the deep trenches is reduced significantly. This leads to longer etching durations to achieve incrementally higher trench depths. This is believed to be a bottleneck that impedes trench etching deeper than xcx9c7 xcexcm, especially for 175 nm ground rules and below. In the most severe form of the accumulation of the re-deposited etch by-products layer, the DT hole is completely closed at the top and DT Si etching stops completely.
Conventional, deep trench etching has been performed using a photoresist mask, in which case, the wafer temperature must be maintained below the glass transition temperature of the photoresist mask (i.e., less than about 140xc2x0 C. Deep trench etching has also been performed using a hard mask, such as SiO2. However, in all of the methods of the prior art for deep trench etching, the wafer electrode temperature is held in the conventional temperature range of xe2x89xa6140xc2x0 C.
Referring to FIG. 1, a schematic cross-sectional view of a re-deposited etch by-products layer 10 is illustratively shown. A hardmask 12 is patterned over a pad nitride layer 14 and a substrate 16. Deep trenches 18 are etched into substrate 16. Layer 10 accumulates on sidewalls of trenches 18 especially in a region on and near hardmask 12. An effective diameter d of trenches is reduced by re-deposited layer 10, thereby pinching off the DT structure. This buildup limits the trench depth achievable by the deep trench etching process, and impedes silicon trench etching especially for ground rules below 175 nm.
Therefore, a need exists for methods of etching deep trenches, which avoid redeposition, facilitate removal of etch by-products and permit deep trenches to be extended to greater depths in a substrate.
A method for etching trenches in a substrate, in accordance with the present invention, secures a wafer to an electrode in a plasma chamber and heats the wafer to a temperature of greater than 200 degrees Celsius. The wafer is exposed to a reactive plasma to etch trenches into the substrate of the wafer with minimal redeposition of etch by-products to avoid pinching off the trench and to promote further etching.
Another method for etching trenches in a substrate, in accordance with the present invention, includes the steps of forming a hardmask on a substrate, patterning the hardmask, securing a wafer to an electrode in a plasma chamber, maintaining the electrode at a temperature of between about 200 and about 450 degrees Celsius to achieve about the same temperature in the wafer and exposing the wafer to a reactive plasma to etch trenches into the substrate of the wafer in accordance with the hardmask pattern.
Another method for etching trenches in a substrate, in accordance with the present invention includes the steps of clamping a wafer onto a electrode in a plasma chamber, maintaining the electrode at an elevated temperature between of about 200 degrees and 450 degrees Celsius, exposing the wafer to a reactive plasma including Cl2, BCl3, Ar, O2, and N2, applying a backside pressure to the clamped wafer using He to achieve thermal contact between the wafer and the electrode such that the wafer is maintained at about the same temperature as the electrode and applying a bias power to the wafer electrode to accelerate ions from the plasma to achieve etching of the substrate to form trenches.
In other methods, the step of heating the wafer may include the step of heating the wafer to a temperature of between about 200 and about 450 degrees Celsius. The step of heating the wafer may include the step of heating the electrode such that heat is transferred to the wafer to provide the temperature of greater than 200 degrees Celsius. The step of heating the wafer may include the step of heating the electrode such that heat is transferred to the wafer to provide the temperature of greater than 200 degrees Celsius. The wafer is preferably secured by clamping and wherein the step of securing the wafer may include the step of applying a backside pressure to the clamped wafer to achieve thermal contact between the wafer and the electrode.
In still other methods, the step of exposing the wafer to the reactive plasma may include the step of exposing the wafer to a reactive plasma including at least one of Cl2, HBr, HCl and BCl3. The step of exposing the wafer to the reactive plasma may include the step of exposing the wafer to Ar. The step of exposing the wafer to the reactive plasma may include the step of exposing the wafer to additive gases to increase selectivity between an etch mask and the substrate during formation of the trenches. The additive gases may include at least one of O2 and N2. The additive gases may include O2 with a flow of between about 6% to about 40% of a total gas flow. The additive gases may include N2 with a flow of between about 10% to about 30% of a total gas flow. The step of exposing the wafer to the reactive plasma may include the step exposing the wafer to a gas combination including Cl2, BCl3, Ar, O2, and N2. The step of securing a wafer to an electrode may include securing the wafer in an unclamped state and the step of heating the wafer may include bombarding the wafer with plasma ions to generate heat.
These and other objects, features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings.